Coherent data transfers

CPU side transfer

This is when the CPU needs to transfer multiple pieces of information to the eTPU and the data must be transfered in a way the data

Single parameter

When one parameter is accessed a 32-bit access should always be used to garuantee coherency. Two 16-bit accesses may NOT be coherent.

Two parameters

When 2 parameters need to be updated coherently the Coherent Dual Parameter Controller (CDC) should be used. This is a module in the eTPU that allows the CPU to do 2 parameter accesses to paramater RAM atomically. The eTPU engine(s) can not break a CDC access.

More than 2 parameters

Not directly supported. Developers must develop their own scheme at a higher level. 

eTPU side

The eTPU can make 2 consecutive data accesses when they are made in consecutive instructions, and when the preceeding instruction does not contain a RAM sub-instruction.  There are some macros available that can hlep with this, although care must be taken when using these:

#define _coherentread(a_source,a_dest,b_source,b_dest)

#define _coherentwrite(a_dest,a_source,b_dest,b_source)

ETEC provides enhanced capabilities for coherency, with a standard library of intrinsic coherency functions.  The currently available functions are:

// coherent read functions; equivalent to *dest1 = src1; *dest2 = src2; where the reads of src1 and src2 are coherent.

void _CoherentRead24_24(int24* dest1, int24 src1, int24* dest2, int24 src2);

void _CoherentRead24_32(int24* dest1, int24 src1, int32* dest2, int32 src2);

// coherent write functions; equivalent to *dest1 = src1; *dest2 = src2; where the writes of *dest1 and *dest2 are coherent.

void _CoherentWrite24_24(int24* dest1, int24 src1, int24* dest2, int24 src2);

void _CoherentWrite24_32(int24* dest1, int24 src1, int32* dest2, int32 src2);